Conventional arrangements including a program-controlled unit and a power chip are typically arranged such that    the power chip is additionally connected to electric loads, and drives these electric loads in accordance with timing input to it by means of load control data,    the program-controlled unit transmits to the power chip the abovementioned load control data and control data controlling the power chip, and    the power chip transmits to the program-controlled unit diagnostic data by means of which states prevailing in the power chip or events occurring are represented.
In the present case, the program-controlled unit mentioned shall be a microcontroller but can also be, for example, a microprocessor or a signal processor.
In the microcontroller, a control program is executed by means of which it is defined how the electric loads connected to the power chip are to be driven. However, the microcontroller does not itself drive the loads but does this via the power chip.
The power chip essentially does nothing else except drive the electric loads connected to it in accordance with the inputs received from the microcontroller.
Such arrangements are used, for example, when the microcontroller is not capable of driving the electric loads itself. This is the case, in particular, when the voltages and/or currents to be supplied to the loads are of such a magnitude that the microcontroller cannot generate them itself, or could only generate them itself at an expenditure which is not justifiable.
Such arrangements are used, for example, but not exclusively, in motor vehicle control devices. Motor vehicle control devices must control, among other things, a whole number of loads by supplying energy and interrupting the energy supply. Most of the loads must be supplied with voltages which are so high (for example 12 V) and/or currents which are so high (for example 1 A and greater) that they cannot be generated by a microcontroller, but can be generated quite easily by a power chip.
The power chip can be configured by the microcontroller and is provided with the timing for the load control by the microcontroller.
The power chip is configured by transmitting data, called control data in the text which follows, from the microcontroller to the power chip. By means of the configuration of the power chip, it is possible to set in it, for example, whether it is to operate in normal mode or in a special mode, for example in sleep mode.
Inputting the timing for the load control is done by transmitting signals or data, called load control data in the text which follows, to the power chip. The load control data used can be, for example, pulse-width-modulated signals generated by a timer of the microcontroller.
The power chip conveys to the microcontroller status information by means of which states prevailing in the power chip or events occurring are signaled to the microcontroller. The status information is conveyed by transmitting data, called diagnostic data in the text which follows, to the microcontroller. By means of these diagnostic data, it is possible to signal to the microcontroller, for example, that a load is drawing too much current or that there is an excessive temperature.
In arrangements of the type described above, the transmission of the load control data, among other things, represents a problem.
Until recently, the transmission was carried out in such a manner that, for each load connected to the power chip, a separate pulse-width-modulated signal was transmitted on its own line to the power chip.
This type of load control data transmission is disadvantageous because the microcontroller and the power chip must be connected to one another via a very large number of lines in this case and must have a correspondingly large number of input and/or output connections.
In the meantime, this problem has already been recognized and ameliorated by the development of the so-called microsecond bus. The microsecond bus exhibits the special feature that the load control signals previously transmitted to the power chip in parallel are sampled at regular time intervals, for example at time intervals of 1 μs, and that the samples are transmitted serially to the power chip via a single transmission channel. From the data supplied to it, the power chip reconstructs the sampled pulse-width-modulated signals and appropriately drives the loads connected to it. This makes it possible to achieve a considerable reduction in the lines to be provided between the microcontroller and the power chip and the number of input and/or output connections of the microcontroller and of the power chip to be provided is also correspondingly lower.
FIG. 1 shows the basic configuration of an arrangement in which a microcontroller and a power chip are connected to one another via a microsecond bus.
FIG. 1 shows a microcontroller MC, a power chip PC and a microsecond bus MSB connecting the microcontroller and the power chip.
The microcontroller MC contains a central processing unit CPU, a timer T1, a microsecond bus controller MSC, and various other units P1 to Pn, said components being connected to one another via an internal system bus SYSBUS.
The timer T1 generates the timing of the pulse-width-modulated signals providing load control, and supplies these to the microsecond bus controller MSC via the system bus SYSBUS. In the example considered, the timer generates a total of 16 output signals, each of which comprises one bit, and indicates whether a condition set in the timer and allocated to the respective timer output signal is met or not. The timer output signals are transmitted at particular time intervals, for example at time intervals of 1 μs, to the microsecond bus controller MSC which serially transmits these signals to the power chip PC via the microsecond bus MSB.
The microsecond bus MSB comprises a first transmission channel TC1 and a second transmission channel TC2, the first transmission channel TC1 consisting of lines DATA1a, DATA1b, CLK1 and CS1, and the second transmission channel TC2 consisting of lines DATA2, CLK2 and CS2.
Via line CLK2, the microcontroller MC transmits a transmission clock signal to the power chip PC.
Via the line DATA2, the microcontroller MC serially transmits the respective current levels of the timer output signals, that is to say the load control data, to the power chip PC at the rate of the transmission clock signal transmitted via the line CLK2.
Via line CS2, the microcontroller MC transmits to the power chip PC a chip select signal by means of which the beginning and the end of the transmission of data intended for the power chip are signaled to the power chip via the line DATA2.
Via line CLK1, the microcontroller MC transmits a transmission clock signal to the power chip PC.
Via line DATA1a, the microcontroller MC serially transmits control data to the power chip PC at the rate of the transmission clock signal transmitted via the line CLK1 and, in synchronism therewith, the power chip PC serially transmits diagnostic data to the microcontroller via the line DATA1b. 
Via line CS1, the microcontroller MC transmits to the power chip PC a chip select signal by means of which the beginning and the end of the transmission of data intended for the power chip are signaled to the power chip via line DATA1a. 
As can be seen from the above explanations, the number of lines between the microcontroller MC and the power chip PC, and thus also the number of input and/or output connections of the microcontroller and of the power chip, can be considerably reduced by using the microsecond bus. Between the microcontroller MC and the power chip PC only 7 lines need to be provided now; during the transmission of the timer output signals via a separate line in each case, 16 lines would have to be provided just for the transmission of the timer output signals.
Experience shows that various problems remain unsolved even when the microsecond bus is used. In particular, the behavior of the power chip can provide problems at times. This can significantly restrict the possibilities for using the conventional arrangement described above.